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🎥 728x90 LEADERBOARD AD — GIF/Video: Next‑gen RISC-V AI Accelerator

Semiconductor IP Cores

Silicon-proven CPU, GPU, AI, Security & Interface IP for SoC designs.

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NeuroCore NPU

128 TOPS, sparse acceleration.

AI Accelerators
PCIe 6.0 PHY

64 GT/s, low latency, SR-IOV.

Interface IP
SecureVault Crypto

TRNG, PQC, AES, SHA.

Security IP
VisionDSP V8 AI

256 MAC/cycle, radar & vision processing.

DSP Cores
Mali-GX3 GPU IP

Tile-based renderer, Vulkan 1.3, ray tracing.

GPU Cores

Industry News

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New AI Accelerator IP 256 TOPS Apr 5, 2025

Industry highest density neural engine.

RISC-V Vector 1.0 ratified Apr 2, 2025

Accelerating AI/ML workloads.

Automotive safety IP ASIL-D Apr 1, 2025

Complete functional safety solution.

Chiplet UCIe 2.0 advances Mar 28, 2025

Major foundries adopt new interconnect.

Latest IP Cores

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NeuroCo…

128 TO…

AI Accelerators
PCIe 6…

64 GT/…

Interface IP
SecureVau…

TRNG…

Security IP
VisionDS…

256 MAC/c…

DSP Cores
Mali-GX3…

Tile-base…

GPU Cores
NeoZEN CPU C…

64-bit out…

CPU Cores

Press Releases

5nm PCIe 6.0 PHY IP with 30% lower latency

Connectivity High-Speed Data Center

Industry-first complete solution for 5nm.

Automotive safety IP certified ASIL-D ready

Automotive Functional Safety ISO 26262

Robust fault management for ADAS.

Post-Quantum Cryptography IP now available

Security Quantum-safe IoT

First PQC hardened root of trust.

SiliconCore partners with leading foundry for 2nm

Partnership Advanced Node AI

Collaboration accelerates next-gen AI IP.

Trusted Partners

Synopsys Synopsys
Cadence Cadence
Arm Arm
SiFive SiFive

Tech Insights

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RISC-V vs ARM: The Future of Custom Compute

Analysis of open ISA vs proprietary architectures.

Chiplet Integration & UCIe IP Trends

How die-to-die IP changes packaging and design.

Edge AI: Low-Power NPU Design

Optimizing neural processing for edge devices.